I am a Professor in the School of Computational Science and Engineering at Georgia Tech. My research is in an area called high-performance computing (HPC), which also goes by the arguably cooler moniker of supercomputing!
Office hours (Fall 2019). TBD in Coda 1217-South. However, the Coda Building (where I sit) restricts access to all the floors, so unless you are officially registered in one of my classes, you may need to tell me ahead of time that you are coming so I can pre-register you as an expected visitor.
The HPC Garage is my research lab. We design communication-efficient algorithms and write blazingly fast code. We are motivated primarily by applications in scientific computing and statistical data analysis, and we usually target high-end computing platforms, a.k.a., supercomputers. We will soon be updating our website, where you will be able to learn more, at: hpcgarage.org. In the meantime, check us out on social media!
Ph.D. in Computer Science, 2004
University of California, Berkeley
B.S. in Computer Science, 1997
Here are of the courses I have taught or will soon teach. (F=Fall, S=Spring, OMS=Online MS in CS offerings.)
(for talk announcements)
Richard (Rich) Vuduc is a Professor at the Georgia Institute of Technology (“Georgia Tech”). He works in the School of Computational Science and Engineering, a department devoted to the study of computer-based modeling, simulation, and data-driven analysis of natural and engineered systems. His research lab, The HPC Garage (@hpcgarage), is interested in high-performance computing, with an emphasis on algorithms, performance analysis, and performance engineering. He is a recipient of a DARPA Computer Science Study Group grant; an NSF CAREER award; a collaborative Gordon Bell Prize in 2010; Lockheed-Martin Aeronautics Company Dean’s Award for Teaching Excellence (2013); and Best Paper or Best Student Paper Awards at the SIAM Conference on Data Mining (SDM, 2012), the IEEE Parallel and Distributed Processing Symposium (IPDPS, 2015), and the ACM/IEEE Conference on Supercomputing (SC, 2018), among others. He has also served as his department’s Associate Chair and Director of its graduate programs. External to Georgia Tech, he currently serves as Chair of the SIAM Activity Group on Supercomputing (2018-2020); co-chaired the Technical Papers Program of the “Supercomputing” (SC) Conference in 2016; and serves as an associate editor of the ACM Transactions on Parallel Computing (TOPC) and the International Journal of High-Performance Computing Applications, and previously for the IEEE Transactions on Parallel and Distributed Systems. He received his Ph.D. in Computer Science from the University of California, Berkeley, and was a postdoctoral scholar in the Center for Advanced Scientific Computing the Lawrence Livermore National Laboratory.